1 standard ics quad d latch BU4042B the BU4042B is a four-circuit d latch with a common clock line and separate data input terminals. when the polarity input is set to ?? input (d) is presented to output (q) as is, as long as the clock input is rising, and when the clock input falls, output (q) holds input (d) at that point. while the clock input is falling, output (q) does not change even if input (d) changes. also, if the polarity input is set to ?? input (d) is presented to output (q) as is, as long as the clock input is at ? level, and when the clock input goes to ??level, latching takes place. features 1) low power dissipation. 2) wide range of operating power supply voltages. 3) high input impedance. 4) high fan-out. 5) direct drive of 2 l-ttl inputs and 1ls-ttl input. block diagram q 4 1 q 1 2 q 1 3 d 1 4 clock 5 polarity 6 d 2 7 v ss 8 v dd 16 q 4 15 cl d d 4 14 d 3 13 q 3 12 q 3 11 q 2 10 q 2 9 q q cl d q q cl d q q cl d q q logic circuit diagram (6) latch 1 d 1 (4) d 2 (7) d 3 (13) d 4 (14) clock (5) polarity (3) (10) (9) (11) (12) (1) (15) (2) q 1 q 2 q 2 q 3 q 3 q 4 q 4 latch 2 latch 3 latch 4 q 1 truth table clock polarity q ll d h l latch hh d l h latch
2 standard ics BU4042B absolute maximum ratings (ta = 25?, v ss = 0v) parameter symbol limits unit power supply voltage v dd v power dissipation mw operating temperature ? 40 ~ + 85 c storage temperature ? 55 ~ + 150 c input voltage v in v pd topr tstg 1000 (dip) ? 0.3 ~ + 18 ? 0.3 ~ v dd + 0.3 electrical characteristics dc characteristics (unless otherwise noted, ta = 25?, v ss = 0v) parameter symbol min. typ. max. unit conditions input high level voltage (data) v ih 3.5 v 5 7.0 10 11.0 15 input high level voltage clock polarity () v ih 3.5 v 5 7.0 10 11.25 15 input low level voltage (data) v il 1.5 v 5 3.0 10 4.0 15 input low level voltage v il 1.5 v 5 3.0 10 3.75 15 input high level current i ih 0.3 m a15v ih = 15v input low level current i il ? 0.3 m a15v il = 0v output high level voltage v oh 4.95 v 5 i o = 0ma 9.95 10 14.95 15 output low level voltage v ol 0.05 v 5 i o = 0ma 0.05 10 0.05 15 output high level current i oh ? 0.16 ma 5v oh = 4.6v ? 0.4 10 v oh = 9.5v ? 1.2 15 v oh = 13.5v output low level current i ol 0.44 ma 5v ol = 0.4v 1.1 10 v ol = 0.5v 3.0 15 v ol = 1.5v static current dissipation i dd 4.0 m a 5 v i = v dd or gnd 8.0 10 16.0 15 v dd (v) clock polarity ()
3 standard ics BU4042B switching characteristics (unless otherwise noted, ta = 25?, c l = 50pf, v ss = 0v) parameter symbol min. typ. max. unit conditions measurement circuit t tlh 180 ns 5 fig.1 90 10 65 15 t thl 100 ns 5 fig.1 50 10 40 15 propagation delay time t plh t phl 220 ns 5 fig.1 90 10 70 15 propagation delay time clock ? q, q t plh t phl 220 ns 5 fig.2 90 10 70 15 minimum clock pulse width t wh t wl 150 ns 5 fig.2 50 10 40 15 hold time t h 50 ns 5 fig.2 25 10 20 15 setup time t su 50 ns 5 fig.2 20 10 5 15 input capacitance c in 5 pf v dd (v) output fall time output rise time d ? q, q measurement circuits v dd v dd v ss v ss ck 5 16 pol 6 d 1 4 d 2 d 3 7 8 d 4 14 2 q 1 3 q 1 10 q 2 9 q 2 11 q 3 12 q 3 1 q 4 5 q 4 p.g. 13 fig. 1 (a) switching characteristics measurement circuit ! note: connect c l = 50pf to each of the output pins. 20ns 20ns t plh t tlh d t thl t phl t phl t thl t tlh q q fig. 1 (b) switching time measurement waveform !
4 standard ics BU4042B v dd v ss v ss ck 5 16 pol 6 d 1 d 3 d 2 8 d 4 h l 2 q 1 3 q 1 10 q 2 9 q 2 11 q 3 12 q 3 1 q 4 15 q 4 p.g. 2 4 7 13 14 p.g. 1 fig. 2 (a) switching characteristics measurement circuit @ note : connect c l = 50pf to each of the output pins. 20ns 20ns ck d q 90% 50% 10% 20ns 90% 50% 50% 10% t wh t wl t plh t su t phl t h fig. 2 (b) switching time measurement waveform @ electrical characteristic curve power dissipation : p d (mw) 1200 1000 800 600 400 200 0 0 25 50 75 100 125 150 ambient temperature : ta ( c) fig.3 power dissipation vs. ta external dimensions (units: mm) dip16 0.51min. 0.3 0.1 9 16 8 1 6.5 0.3 3.2 0.2 4.25 0.3 0.5 0.1 19.4 0.3 2.54 0 ~ 15 7.62
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